Semiconductor-based integrated circuits are typically manufactured through the formation of a set of layers on a wafer containing many integrated circuit areas that are later separated into individual dies. Very thin layers of material are deposited one on top of the other in patterns and processed to form integrated circuit components.
One technique of deposition and patterning is photolithography where a material layer is first coated with a light-sensitive photoresist. The photoresist is exposed through a pattern mask of a desired circuit pattern. Depending upon the type of photoresist used, the exposed photoresist is developed to remove either the exposed or unexposed resist. Etching and/or deposition processes are then used to create the desired circuit within the pattern created.
In most cases, the pattern mask should be precisely aligned on a wafer during processing. The overlay of the mask, the measure of how accurately the pattern mask is aligned, will often determine whether the wafer will be functional or must be discarded. Because each wafer may undergo numerous photolithography processing steps, the alignment of each pattern mask, especially the last ones used, is dependant upon the correct alignment of earlier masks. Poor overlay may destroy the intended electrical properties of a circuit device on a wafer.
A common practice in registration, or matching in position, of overlying layers in a semiconductor wafer is to use metrology structures such as registration patterns or marks in each layer of the wafer in regions outside of a circuit region. In particular, the box-in-box registration pattern is commonly used today. This technique employs squares of different sizes on the layers to be registered. When the two layers are exactly matched in position, or registered, the squares are concentric. Any registration error produces a displacement of the squares relative to each other. To ensure ideal registration between masks, four box-in-box alignments are typically performed simultaneously, with the boxes located at the four corners of the image field.
Since semiconductor devices are expensive to fabricate, it is desirable to verify registration after the application of each layer. If the displacement of the layers is outside tolerable limits, sometimes the defective layer can be removed or replaced with an accurately registered layer. In other cases, the substrate is discarded so that further processing steps are not performed on a defective substrate. In any event, significant registration errors must be noted and corrected, otherwise subsequently fabricated wafers would likely have the same registration errors.
In the prior art, monitoring and verification of registration was done manually. Laboratory operators using microscopes examined the registration of overlying layers on each semiconductor wafer. Unavoidably, this technique was slow, subject to human errors and capable of producing substrate contamination.
Recently, the registration of overlying layers has been measured by automated systems, such as optical microscopy and scanning electron microscopy (SEM). For example, registration errors can be measured by a process in which an image of a set of registration patterns, such as box-in-box, recorded by a video camera through a microscope, are processed to obtain a measurement of the registration error.
As feature sizes and the alignment requirements of semiconductor devices shrink, the lens distortion of the exposure system has a larger impact on the alignment budget. Alignment errors due to lens distortions have been shown to be dependent on feature size and pitch. This size and pitch dependency can induce a measured alignment offset difference between the standard box-in-box method and the actual circuit layers of interest.
Accordingly, a method for measuring displacement between layers of a semiconductor wafer, which is inexpensive to implement, fast in operation and simple to automate is needed. There is also a need for a method that allows accurate measurement of layer registration errors, while avoiding the systematic errors associated with the prior art measurement systems.